5 Commits

Author	SHA1	Message	Date
thfu	6908587dae	v01-enable of clk_div2;8pin to 4pin;valid I/O	2024-11-25 23:05:43 +08:00
thfu	34cf630d95	v01-coef both with 32bit;width parameterized	2024-11-25 20:26:22 +08:00
thfu	2fdaaa3611	Fit modification of enable signal as clk divided by 2	2024-11-04 19:07:35 +08:00
thfu	85b2d97c02	modify relevant .v file and .m file to verify the accuracy of rtl code	2024-10-17 17:29:11 +08:00
unknown	c6ff7dc280	add 8 interpolation	2024-10-08 11:24:32 +08:00