From 4922a2f5d336aa85d28e50147d57c05dfe31f8bc Mon Sep 17 00:00:00 2001 From: yangshenbo Date: Tue, 28 Jul 2026 17:57:28 +0800 Subject: [PATCH] =?UTF-8?q?=E5=A2=9E=E5=8A=A0=E5=9B=9B=E9=80=9A=E9=81=93?= =?UTF-8?q?=E7=94=9F=E6=88=90=E5=99=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- 4ch-Z_Generator/.idea/.gitignore | 8 + 4ch-Z_Generator/.idea/.name | 1 + 4ch-Z_Generator/.idea/4ch-Z_Generator.iml | 8 + .../inspectionProfiles/Project_Default.xml | 17 + .../inspectionProfiles/profiles_settings.xml | 6 + 4ch-Z_Generator/.idea/misc.xml | 7 + 4ch-Z_Generator/.idea/modules.xml | 8 + .../FourChZAssemblyTemplateManager.py | 300 ++++ 4ch-Z_Generator/FourChZCaseGenerator.ipynb | 404 +++++ 4ch-Z_Generator/FourChZChipConfig.py | 189 +++ 4ch-Z_Generator/FourChZEnvelopeGenerator.py | 194 +++ 4ch-Z_Generator/FourChZreg_define.py | 279 ++++ 4ch-Z_Generator/ParamsManager.py | 56 + ...ChZAssemblyTemplateManager.cpython-311.pyc | Bin 0 -> 13773 bytes .../FourChZChipConfig.cpython-311.pyc | Bin 0 -> 11879 bytes .../FourChZEnvelopeGenerator.cpython-311.pyc | Bin 0 -> 12585 bytes .../FourChZreg_define.cpython-311.pyc | Bin 0 -> 7338 bytes .../__pycache__/ParamsManager.cpython-311.pyc | Bin 0 -> 3205 bytes .../__pycache__/make_case.cpython-311.pyc | Bin 0 -> 5876 bytes .../__pycache__/make_inst.cpython-311.pyc | Bin 0 -> 14374 bytes .../__pycache__/accz_gen.cpython-311.pyc | Bin 0 -> 1567 bytes .../env_gen/__pycache__/acz.cpython-311.pyc | Bin 0 -> 10968 bytes .../__pycache__/flattop.cpython-311.pyc | Bin 0 -> 1332 bytes 4ch-Z_Generator/env_gen/accz.py | 28 + 4ch-Z_Generator/env_gen/accz_gen.py | 19 + 4ch-Z_Generator/env_gen/acz.py | 208 +++ 4ch-Z_Generator/env_gen/flattop.py | 75 + 4ch-Z_Generator/gen_cases/General/env2.json | 150 ++ .../gen_cases/General/env2_HEX.txt | 1452 +++++++++++++++++ .../gen_cases/RAMP/RAMP_MCU_FIXED.json | 49 + .../gen_cases/RAMP/RAMP_MCU_FIXED_HEX.txt | 316 ++++ 4ch-Z_Generator/make_case.py | 93 ++ 4ch-Z_Generator/make_inst.py | 319 ++++ Z_case_Generator_V2.0/ZChipConfig.py | 2 +- .../__pycache__/ZChipConfig.cpython-311.pyc | Bin 18743 -> 18731 bytes .../gen_cases/General/env.json | 4 +- .../gen_cases/General/env_HEX.txt | 71 +- Z_case_Generator_V2.0/z_case_gen.ipynb | 37 +- 38 files changed, 4215 insertions(+), 85 deletions(-) create mode 100644 4ch-Z_Generator/.idea/.gitignore create mode 100644 4ch-Z_Generator/.idea/.name create mode 100644 4ch-Z_Generator/.idea/4ch-Z_Generator.iml create mode 100644 4ch-Z_Generator/.idea/inspectionProfiles/Project_Default.xml create mode 100644 4ch-Z_Generator/.idea/inspectionProfiles/profiles_settings.xml create mode 100644 4ch-Z_Generator/.idea/misc.xml create mode 100644 4ch-Z_Generator/.idea/modules.xml create mode 100644 4ch-Z_Generator/FourChZAssemblyTemplateManager.py create mode 100644 4ch-Z_Generator/FourChZCaseGenerator.ipynb create mode 100644 4ch-Z_Generator/FourChZChipConfig.py create mode 100644 4ch-Z_Generator/FourChZEnvelopeGenerator.py create mode 100644 4ch-Z_Generator/FourChZreg_define.py create mode 100644 4ch-Z_Generator/ParamsManager.py create mode 100644 4ch-Z_Generator/__pycache__/FourChZAssemblyTemplateManager.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/FourChZChipConfig.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/FourChZEnvelopeGenerator.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/FourChZreg_define.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/ParamsManager.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/make_case.cpython-311.pyc create mode 100644 4ch-Z_Generator/__pycache__/make_inst.cpython-311.pyc create mode 100644 4ch-Z_Generator/env_gen/__pycache__/accz_gen.cpython-311.pyc create mode 100644 4ch-Z_Generator/env_gen/__pycache__/acz.cpython-311.pyc create mode 100644 4ch-Z_Generator/env_gen/__pycache__/flattop.cpython-311.pyc create mode 100644 4ch-Z_Generator/env_gen/accz.py create mode 100644 4ch-Z_Generator/env_gen/accz_gen.py create mode 100644 4ch-Z_Generator/env_gen/acz.py create mode 100644 4ch-Z_Generator/env_gen/flattop.py create mode 100644 4ch-Z_Generator/gen_cases/General/env2.json create mode 100644 4ch-Z_Generator/gen_cases/General/env2_HEX.txt create mode 100644 4ch-Z_Generator/gen_cases/RAMP/RAMP_MCU_FIXED.json create mode 100644 4ch-Z_Generator/gen_cases/RAMP/RAMP_MCU_FIXED_HEX.txt create mode 100644 4ch-Z_Generator/make_case.py create mode 100644 4ch-Z_Generator/make_inst.py diff --git a/4ch-Z_Generator/.idea/.gitignore b/4ch-Z_Generator/.idea/.gitignore new file mode 100644 index 0000000..35410ca --- /dev/null +++ b/4ch-Z_Generator/.idea/.gitignore @@ -0,0 +1,8 @@ +# 默认忽略的文件 +/shelf/ +/workspace.xml +# 基于编辑器的 HTTP 客户端请求 +/httpRequests/ +# Datasource local storage ignored files +/dataSources/ +/dataSources.local.xml diff --git a/4ch-Z_Generator/.idea/.name b/4ch-Z_Generator/.idea/.name new file mode 100644 index 0000000..759fd84 --- /dev/null +++ b/4ch-Z_Generator/.idea/.name @@ -0,0 +1 @@ +FourChZCaseGenerator.ipynb \ No newline at end of file diff --git a/4ch-Z_Generator/.idea/4ch-Z_Generator.iml b/4ch-Z_Generator/.idea/4ch-Z_Generator.iml new file mode 100644 index 0000000..909438d --- /dev/null +++ b/4ch-Z_Generator/.idea/4ch-Z_Generator.iml @@ -0,0 +1,8 @@ + + + + + + + + \ No newline at end of file diff --git a/4ch-Z_Generator/.idea/inspectionProfiles/Project_Default.xml b/4ch-Z_Generator/.idea/inspectionProfiles/Project_Default.xml new file mode 100644 index 0000000..4c429e7 --- /dev/null +++ b/4ch-Z_Generator/.idea/inspectionProfiles/Project_Default.xml @@ -0,0 +1,17 @@ + + + + \ No newline at end of file diff --git a/4ch-Z_Generator/.idea/inspectionProfiles/profiles_settings.xml b/4ch-Z_Generator/.idea/inspectionProfiles/profiles_settings.xml new file mode 100644 index 0000000..105ce2d --- /dev/null +++ b/4ch-Z_Generator/.idea/inspectionProfiles/profiles_settings.xml @@ -0,0 +1,6 @@ + + + + \ No newline at end of file diff --git a/4ch-Z_Generator/.idea/misc.xml b/4ch-Z_Generator/.idea/misc.xml new file mode 100644 index 0000000..a6218fe --- /dev/null +++ b/4ch-Z_Generator/.idea/misc.xml @@ -0,0 +1,7 @@ + + + + + + \ No newline at end of file diff --git a/4ch-Z_Generator/.idea/modules.xml b/4ch-Z_Generator/.idea/modules.xml new file mode 100644 index 0000000..f11a6d6 --- /dev/null +++ b/4ch-Z_Generator/.idea/modules.xml @@ -0,0 +1,8 @@ + + + + + + + + \ No newline at end of file diff --git a/4ch-Z_Generator/FourChZAssemblyTemplateManager.py b/4ch-Z_Generator/FourChZAssemblyTemplateManager.py new file mode 100644 index 0000000..e5a5489 --- /dev/null +++ b/4ch-Z_Generator/FourChZAssemblyTemplateManager.py @@ -0,0 +1,300 @@ +import numpy as np +import copy +from typing import List +from FourChZreg_define import * + + +class AssemblyTemplateManager: + """汇编指令模板管理器""" + + def __init__(self, mk_instance, mk_instr, **kwargs): + self.mk = mk_instance + self.mk_instr = mk_instr + self.config_file = kwargs.get('config_file') + self.templates = { + 'general_send_wait': self._generic_awg_control_template, + 'ramp_fixed': self._ramp_mcu_fixed_template, + 'ramp_step': self._ramp_mcu_template + } + + def create_instructions(self, **kwargs): + template_type = kwargs.get('instr_type', str) + params = copy.deepcopy(kwargs) + return self.templates[template_type](**params) + + def _codeword_encode(self, **kwargs): + sendc = kwargs.pop('sendc', 0) + wave_hold = kwargs.pop('wave_hold', 0) + ff_amp_index = kwargs.pop('ff_amp_index', 0) + fm_amp_index = kwargs.pop('fm_amp_index', 0) + bias_index = kwargs.pop('bias_index', 0) + fcw_index = kwargs.pop('fcw_index', 0) + pcw_index = kwargs.pop('pcw_index', 0) + code_clr = kwargs.pop('code_clr', 0) + env_index = kwargs.pop('env_index', 0) + + codeword = 0 + codeword |= sendc << 31 + codeword |= wave_hold << 30 + codeword |= ff_amp_index << 28 + codeword |= fm_amp_index << 26 + codeword |= bias_index << 24 + codeword |= fcw_index << 22 + codeword |= pcw_index << 19 + codeword |= code_clr << 18 + codeword |= env_index << 12 + + return codeword + + def _codeword_gen(self, **kwargs): + codeword_configs = kwargs.pop('codeword_configs', []) + codeword_list = [] + for config in codeword_configs: + codeword = self._codeword_encode(**config) + codeword_list.append(codeword) + return codeword_list + + def write_register(self, address, value): + self.mk.rw_once('w', address, value, self.config_file) + + def _generic_awg_control_template(self, **kwargs): + """ + 通用 AWG汇编控制模版 (支持扫参) + """ + channel = kwargs.get('channel', 0) + codeword_list = self._codeword_gen(**kwargs) + send_interval_list = kwargs.get('send_interval', [100]) + cycle_num = kwargs.get('cycle_num', 1) + sweep_config = kwargs.get('sweep_config', {}) + sweep_num = sweep_config.get('sweep_num', 1) + sweep_offsets = sweep_config.get('offsets', []) + sweep_steps = sweep_config.get('steps', []) + sweep_reg_num = len(sweep_offsets) + + dtcm_payload = [sweep_num, cycle_num, len(codeword_list), sweep_reg_num] + + for cw, wait_clk in zip(codeword_list, send_interval_list): + dtcm_payload.append(cw) + dtcm_payload.append(wait_clk) + + if sweep_reg_num > 0: + dtcm_payload.extend(sweep_offsets) + dtcm_payload.extend([s & 0xFFFFFFFF for s in sweep_steps]) + + dtcm_base = addr_base['DTCM0_BASE'] + channel * 0x600000 + target_addr = dtcm_base + FourChZreg_define['mcu_reg']['DTFR'] + 4 + self.write_register(target_addr, dtcm_payload) + + return f""" + start: + lui x1 , 0x100 + lui x2 , 0x200 + + addi x3 , x0 , 4 + addi x4 , x0 , 22 + addi x5 , x1 , 0x40 + addi x6 , x2 , 0x40 + + load_nco_params_loop: + addi x4 , x4 , -1 + lw x31, 0x00(x5) + sw x31, 0x00(x6) + add x5 , x5 , x3 + add x6 , x6 , x3 + bne x4 , x0 , load_nco_params_loop + + lw x31, 0xb4(x1) + sw x31, 0xb4(x2) + + lw x10, 0xdc(x1) + lw x11, 0xe0(x1) + lw x12, 0xe4(x1) + lw x17, 0xe8(x1) + + addi x13, x1 , 0xec + slli x14, x12, 3 + add x18, x13, x14 + slli x14, x17, 2 + add x20, x18, x14 + + run_sweep_iteration: + addi x28, x11, 0 + middle_ensemble_loop: + addi x28, x28, -1 + addi x26, x12, 0 + addi x25, x13, 0 + + inner_wave_send_loop: + addi x26, x26, -1 + lw x31, 0x00(x25) + lw x30, 0x04(x25) + addi x25, x25, 8 + + send x0 , x31, 0 + + bne x26, x0 , inner_wait_branch + beq x0 , x0 , outer_wait_branch + + inner_wait_branch: + wait x0 , x30, -24 + bne x26, x0 , inner_wave_send_loop + + outer_wait_branch: + wait x0 , x30, -36 + bne x28, x0 , middle_ensemble_loop + + beq x10, x0 , mcu_exit + addi x10, x10, -1 + wait x0 , x0 , 100 + + beq x17, x0 , run_sweep_iteration + addi x4 , x17, 0 + addi x21, x18, 0 + addi x23, x20, 0 + + update_param_loop: + addi x4 , x4 , -1 + lw x29, 0(x21) + lw x24, 0(x23) + + add x5 , x1 , x29 + lw x31, 0(x5) + add x31, x31, x24 + sw x31, 0(x5) + + add x6 , x2 , x29 + sw x31, 0(x6) + + addi x21, x21, 4 + addi x23, x23, 4 + bne x4 , x0 , update_param_loop + + beq x0 , x0 , run_sweep_iteration + + mcu_exit: + exit x0 , x0 , 0 + """ + + def _ramp_mcu_template(self, **kwargs): + channel = kwargs.pop('channel') + ramp_mcu_registers = [] + ramp_mcu_registers.append(0 << 16) + ramp_mcu_registers += [1 << 31] + param_num = kwargs.pop('param_num') + ensemble_num = kwargs.pop('ensemble_num') + ramp_mcu_registers.append(param_num) + ramp_mcu_registers.append(ensemble_num) + height_list = kwargs.pop('height', 0) + length_list = kwargs.pop('step_time', 0) + for height, length in zip(height_list, length_list): + ramp_mcu_registers += [height << 16] + ramp_mcu_registers += [length] + wait = 65536 / height * length + ramp_mcu_registers += [wait] + + dtcm_base = addr_base['DTCM0_BASE'] + channel * 0x600000 + target_addr = dtcm_base + FourChZreg_define['mcu_reg']['DTFR'] + 4 + self.write_register(target_addr, ramp_mcu_registers) + + return f""" + start: + lui x1 , 0x100 + lui x2 , 0x200 + lw x31, 0xdc(x1) + sw x31, 0xb8(x2) + lw x28, 0xe0(x1) + addi x6 , x0, 12 + lw x7 , 0xe8(x1) + ensemble_loop: + addi x7 , x7, -1 + addi x8 , x1, 0 + lw x5 , 0xe4(x1) + ramp_loop: + addi x5, x5, -1 + lw x31, 0xec(x8) + lw x30, 0xf0(x8) + lw x29, 0xf4(x8) + add x8 , x8 , x6 + sw x30, 0xc0(x2) + sw x31, 0xbc(x2) + sw x28, 0xc4(x2) + wait x0 , x29, -30 + bne x5 , x0 , ramp_loop + bne x7 , x0 , ensemble_loop + sw x0, 0xc4(x2) + exit x0, x0, 0 + """ + + def _ramp_mcu_fixed_template(self, **kwargs): + channel = kwargs.pop('channel') + ramp_mcu_registers = [] + ramp_mcu_registers += [1 << 31] + ensemble_num = kwargs.pop('ensemble_num') + config_param_num = kwargs.pop('config_param_num') + ramp_mcu_registers.append(ensemble_num) + ramp_mcu_registers.append(config_param_num) + fixed_value_list = kwargs.pop('fixed_value') + wait_list = kwargs.pop('wait_clk') + for fixed_value, wait_clk in zip(fixed_value_list, wait_list): + ramp_mcu_registers += [fixed_value << 16 | 1 << 15] + ramp_mcu_registers += [wait_clk] + dtcm_base = addr_base['DTCM0_BASE'] + channel * 0x600000 + target_addr = dtcm_base + FourChZreg_define['mcu_reg']['DTFR'] + 4 + self.write_register(target_addr, ramp_mcu_registers) + + return f""" + start: + lui x1 , 0x100 + lui x2 , 0x200 + lw x31, 0xdc(x1) + sw x31, 0xc4(x2) + addi x3 , x0, 8 + lw x4 , 0xe0(x1) + ensemble_loop: + addi x4 , x4, -1 + addi x6 , x1, 0 + lw x5 , 0xe4(x1) + ramp_loop: + addi x5, x5, -1 + lw x31, 0xe8(x6) + lw x30, 0xec(x6) + sw x31, 0xb8(x2) + add x6 , x6 , x3 + bne x5 , x0 , ramp_loop_wait + jal x0 , ensemble_loop_wait + ramp_loop_wait: + wait x0 , x30, -24 + jal x0 , ramp_loop + ensemble_loop_wait: + wait x0 , x30, -36 + bne x4 , x0 , ensemble_loop + exit: + wait x0 , x0, 15 + sw x0, 0xb8(x2) + sw x0, 0xc4(x2) + exit x0, x0, 0 + """ + + def _write_machine_codes_to_chip(self, machine_codes: str, **kwargs): + # 修正：同时把通道号传给 make_inst 的 channel_id 字段 + channel = kwargs.pop('channel') + self.mk_instr.write( + machine_codes, + self.config_file, + channel_id=channel, + show=kwargs.pop('instr_show', False) + ) + if 'inner_sync' in kwargs: + inner_sync = kwargs.pop('inner_sync') + if inner_sync: + self.write_register(addr_base['SYST_BASE'] + FourChZreg_define['sys_reg']['SYNCR'], 15 << 28 | 1 << 17) + self.mk.rw_once('r', addr_base['SYST_BASE'] + FourChZreg_define['pll_reg']['INTPLL_CLKRXPD'], [0] * 20, + self.config_file) + self.mk.rw_once('r', addr_base['DBGM_BASE'], [0] * 2048, self.config_file) + + +def instruction_config(mk_instance, mk_instr, **kwargs): + # 直接将 **kwargs 传入，__init__ 会自动匹配字典里的 'channel_id'，彻底避免重复传参报错 + asm_templates = AssemblyTemplateManager(mk_instance, mk_instr, **kwargs) + machine_codes = asm_templates.create_instructions(**kwargs) + asm_templates._write_machine_codes_to_chip(machine_codes, **kwargs) \ No newline at end of file diff --git a/4ch-Z_Generator/FourChZCaseGenerator.ipynb b/4ch-Z_Generator/FourChZCaseGenerator.ipynb new file mode 100644 index 0000000..c2007c4 --- /dev/null +++ b/4ch-Z_Generator/FourChZCaseGenerator.ipynb @@ -0,0 +1,404 @@ +{ + "cells": [ + { + "cell_type": "code", + "id": "initial_id", + "metadata": { + "collapsed": true, + "ExecuteTime": { + "end_time": "2026-07-28T09:50:05.947705Z", + "start_time": "2026-07-28T09:50:05.940378Z" + } + }, + "source": [ + "import sys\n", + "import os\n", + "import numpy as np\n", + "from make_case import *\n", + "from make_inst import *\n", + "from FourChZChipConfig import *\n", + "from FourChZAssemblyTemplateManager import *\n", + "from FourChZEnvelopeGenerator import *\n", + "from FourChZreg_define import *\n", + "from ParamsManager import ParamsManager\n", + "from copy import deepcopy\n", + "from itertools import product\n", + "from pathlib import Path\n", + "mk = make_case()\n", + "mk_instr = make_inst()\n", + "from pathlib import Path\n", + "def run_case(params, save_json=True, write_hw=False):\n", + " \"\"\"\n", + " 通用执行函数：自动判断模式并按需调用 configure_chip_output, env_config, instruction_config\n", + " :param output_dir: 可选，自定义输出文件和 JSON 保存的目录路径\n", + " \"\"\"\n", + " # 1. 确定最终输出目录\n", + " base_dir = Path('D:/MyDocument/工作/Z芯片的case生成器/4ch-Z_Generator/gen_cases') # 在这边选择case目录所在位置\n", + " folder_name = params.get('FolderName', 'General') #文件夹名不用在这边改，在case参数里面改\n", + " out_dir = base_dir / folder_name\n", + " \n", + " case_name = params['CaseName'] #Case名不用在这边改，在case参数里面改\n", + " config_file_path = out_dir / f\"{case_name}_HEX.txt\"\n", + " # 更新 params 中的路径信息\n", + " params['config_file'] = str(config_file_path)\n", + " \n", + " # 2. 自动创建目录并初始化保存器\n", + " pm = ParamsManager(out_dir)\n", + " if save_json:\n", + " pm.save(params, case_name)\n", + " \n", + " # 3. 基础芯片输出配置\n", + " config_chip_reg(mk, **params)\n", + " print(\"执行 config_chip_reg\")\n", + " \n", + " # 4. 自动识别并执行包络配置\n", + " if 'envelope_configs' in params or 'envelope_type' in params or 'amp' in params:\n", + " if 'env_config' in globals():\n", + " env_config(mk, **params)\n", + " print(\"执行了 env_config\")\n", + " \n", + " # 5. 自动识别并执行指令配置\n", + " if 'instr_type' in params:\n", + " instruction_config(mk, mk_instr, **params)\n", + " print(\"执行了 instruction_config\")\n", + " \n", + " \n", + " # 7. 基础硬件寄存器下发\n", + " if write_hw:\n", + " channel = params['channel']\n", + " envm_base =addr_base['ENVM0_BASE'] + channel* 0x600000\n", + " itcm_base = addr_base['ITCM0_BASE'] + channel* 0x600000\n", + " mk.rw_once('w',envm_base , 0, params['config_file'])\n", + " instr_type = params.get('instr_type', None)\n", + " if instr_type is None:\n", + " mk.rw_once('w', itcm_base, '0x2B', params['config_file'])\n", + "\n", + " print(f\"生成文件路径：{config_file_path.resolve()}\")\n", + " return None\n", + "\n" + ], + "outputs": [], + "execution_count": 34 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-28T09:52:50.467599Z", + "start_time": "2026-07-28T09:52:50.435623Z" + } + }, + "cell_type": "code", + "source": [ + "#general_send_wait这个汇编模板的 SEND_WAIT效果示例。\n", + "#单通道 AWG通用模板\n", + "param_ch0 = {\n", + " 'channel' : 0,\n", + " 'chip_mode':'AWG', #分为AWG和RAMP模式\n", + " 'mode':'mod', #可选nco nco_fm env mod四种模式\n", + " 'tail_en': False, #拖尾矫正开关\n", + " 'tc_coef_set': 'coef3', #拖尾矫正打开生效\n", + " 'inner_sync': False, #内部触发，应该是软触发，写一个寄存器，就能触发\n", + " 'amp_mod_enable': True, #调幅的开关，mod调制模式下起作用。\n", + " 'freq_mod_enable': True, #nco的开关\n", + " 'bias_enable': True, #必开的开关，AWG模式下，偏置必须打开，否则AWG输出保持为0.\n", + " \n", + " 'fcw': [100, 200, 300, 400], # MHz\n", + " 'mcu_reg_clr': True,\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_ff_pha': 0,\n", + " 'rz_fm_pha': 45,\n", + " 'ff_amp': [32767, 32767, 32767, 32767],\n", + " 'fm_amp': [32767, 32767, 32767, 32767],\n", + " 'bias': [1, 2, 3, 4],\n", + " 'fm_en' :False, #nco_fm的开关，在nco_fm模式时，必须打开,不然nco_fm不工作，就是一条直线. mod的模式下开启fm_en,同时打开nco，就能看到两个正弦波叠加啊\n", + " 'instr_type': 'general_send_wait', #调用汇编搬移上面的数据到mcu_regfile,同时配合下面参数执行指令.AWG固定用这个模板，不用改。\n", + " 'send_interval': [100, 150, 200, 250, 300, 350, 400,450,500],\n", + " 'cycle_num': 1, #0代表无限循环，如果要想扫参，那么这个波形序列就不能无限循环播放\n", + " 'codeword_configs': [\n", + " # {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 0},\n", + " # {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 1},\n", + " # {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 2},\n", + " # {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 3},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 4},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 5},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 6},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 7},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 8},\n", + " ], \n", + " 'sweep_config': {\n", + " 'sweep_num': 0, # 外层循环：如果是0，则代表不扫参，该部分无效，只搬移一次的23个寄存器。如果是 1，代表重载1次寄存器（加上最初的那次，共两次）.\n", + " 'offsets': [0x78, 0x40], # 告诉硬件：本次扫描要修改哪几个寄存器的偏移地址，比如要重载2个寄存器，0x78 = AMPR0 (幅度), 0x40 = CWFR0 (频率) \n", + " 'steps': [3000, int(100 / fs / 4 * 2 ** 32)] # 幅度每次 +3000；频率每次 100MHz (支持负数，Python会自动转32位补码给MCU) ，所以第一次载入是载入初始值，第二次就是原值+steps,第三次就是上一次的值+steps \n", + " },\n", + " 'envelope_configs': [ #包络配置\n", + " {'envelope_type': 'rect_hold', 'amp': 32767},\n", + " {'envelope_type': 'flattop_hold', 'amp': 32767, 'edge_time': 3.5, 'wave_time': 30},\n", + " {'envelope_type': 'acz', 'amp': 32767, 'wave_time': 12 * 4},\n", + " {'envelope_type': 'accz', 'wave_time': 12 * 4},\n", + " {'envelope_type': 'cosine', 'amp': 32767, 'wave_time': 12 * 25},\n", + " {'envelope_type': 'rect', 'amp': 32767, 'wave_time': 12},\n", + " {'envelope_type': 'flattop', 'amp': 32767, 'edge_time': 2, 'wave_time': 22},\n", + " ],\n", + " 'FolderName': 'General',\n", + " 'CaseName': 'env2',\n", + "}\n", + "run_case(param_ch0)\n", + "\n", + "#通道1\n", + "param_ch1 = param_ch0.copy()\n", + "param_ch1['channel'] = 1\n", + "param_ch1['fcw'] = [200, 200, 300, 400]\n", + "run_case(param_ch1)\n", + "\n", + "#通道2\n", + "param_ch2 = param_ch0.copy()\n", + "param_ch2['channel'] = 2\n", + "param_ch2['fcw'] = [300, 200, 300, 400]\n", + "run_case(param_ch2)\n", + "\n", + "#通道3\n", + "param_ch3 = param_ch0.copy()\n", + "param_ch3['channel'] = 3\n", + "param_ch3['fcw'] = [400, 200, 300, 400]\n", + "run_case(param_ch3)\n", + "\n", + "\n" + ], + "id": "3e79e12a64f2769e", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行 config_chip_reg\n", + "执行了 env_config\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\env2_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 env_config\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\env2_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 env_config\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\env2_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 env_config\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\env2_HEX.txt\n" + ] + } + ], + "execution_count": 40 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-28T09:50:35.917889Z", + "start_time": "2026-07-28T09:50:35.900732Z" + } + }, + "cell_type": "code", + "source": [ + "# RAMP 通用模板1\n", + "#RAMP SPI控制\n", + "param_ch0 = {\n", + " 'channel' : 0,\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'SPI',\n", + " 'fixed_enable': True, #是固定值还是斜坡模式\n", + " 'fixed_value': 22767, #固定值模式生效\n", + " 'height': 512, 'step_time': 34 , #斜坡模式生效 ，step_time就是台阶宽度\n", + " \n", + " 'FolderName': 'RAMP',\n", + " 'CaseName': f\"RAMP_SPI\"\n", + "}\n", + "run_case(param_ch0,write_hw = True)\n", + "\n", + "#通道1\n", + "param_ch1 = param_ch0.copy()\n", + "param_ch1['channel'] = 1\n", + "run_case(param_ch1,write_hw = True)\n", + "\n", + "#通道2\n", + "param_ch2 = param_ch0.copy()\n", + "param_ch2['channel'] = 2\n", + "run_case(param_ch2,write_hw = True)\n", + "\n", + "#通道3\n", + "param_ch3 = param_ch0.copy()\n", + "param_ch3['channel'] = 3\n", + "run_case(param_ch3,write_hw = True)\n" + ], + "id": "1f6f70a26d5da7f8", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行 config_chip_reg\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\RAMP\\RAMP_SPI_HEX.txt\n", + "执行 config_chip_reg\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\RAMP\\RAMP_SPI_HEX.txt\n", + "执行 config_chip_reg\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\RAMP\\RAMP_SPI_HEX.txt\n", + "执行 config_chip_reg\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\RAMP\\RAMP_SPI_HEX.txt\n" + ] + } + ], + "execution_count": 36 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-28T09:26:33.012700Z", + "start_time": "2026-07-28T09:26:32.989301Z" + } + }, + "cell_type": "code", + "source": [ + "#RAMP MCU控制时,斜坡模式\n", + "param_ch0 = {\n", + " 'channel' : 0 ,\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'MCU',\n", + " #是固定值还是斜坡模式，如过是斜坡模式，则要指令选ramp_step\n", + " 'instr_type': 'ramp_step', #可选ramp_step或ramp_fixed. mcu执行不同指令操作模板，实现台阶或斜坡这两种模式\n", + " 'ensemble_num' : 2, #大循环次数\n", + " 'param_num' :2, # 循环中参数个数，和列表个数一致\n", + " 'height': [128,256], \n", + " 'step_time': [50,50], \n", + " \n", + " 'FolderName': 'RAMP',\n", + " 'CaseName': f\"RAMP_MCU_STEP\"\n", + "}\n", + "\n", + "run_case(param_ch0,write_hw = True)\n", + "\n", + "#通道1\n", + "param_ch1 = param_ch0.copy()\n", + "param_ch1['channel'] = 1\n", + "run_case(param_ch1,write_hw = True)\n", + "\n", + "#通道2\n", + "param_ch2 = param_ch0.copy()\n", + "param_ch2['channel'] = 2\n", + "run_case(param_ch2,write_hw = True)\n", + "\n", + "#通道3\n", + "param_ch3 = param_ch0.copy()\n", + "param_ch3['channel'] = 3\n", + "run_case(param_ch3,write_hw = True)" + ], + "id": "84e2c612b0a8f7ab", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行 config_chip_reg\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\RAMP_MCU_STEP_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\RAMP_MCU_STEP_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\RAMP_MCU_STEP_HEX.txt\n", + "执行 config_chip_reg\n", + "执行了 instruction_config\n", + "生成文件路径：D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\RAMP_MCU_STEP_HEX.txt\n" + ] + } + ], + "execution_count": 26 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-28T09:51:30.781841Z", + "start_time": "2026-07-28T09:51:30.762192Z" + } + }, + "cell_type": "code", + "source": [ + "#RAMP MCU控制时,固定值模式\n", + "param_ch0 ={\n", + " 'channel' : 0,\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'MCU',\n", + " #是固定值还是斜坡模式，如果是固定值模式，则指令选ramp_fixed\n", + " 'instr_type': 'ramp_fixed', #可选ramp_step或ramp_fixed. mcu执行不同指令操作模板，实现台阶或斜坡这两种模式\n", + " 'fixed_value': [1<<15] + [1<<15 | 1<> 16) + ((last_env_idx & 0xFFFF) << 1) + return env_base_addr << 16 | envelope_length + + def _env_data_pack(self, float_data_array): + data_int = np.round(float_data_array).astype(int) + data_int[data_int < 0] += 65536 + hex_pairs = [] + for data0, data1 in zip(data_int[::2], data_int[1::2]): + hex_pairs.append((data1 << 16) | data0) + + return hex_pairs + + def _generate_envelope_batch(self, **kwargs): + kwargs_copy = copy.deepcopy(kwargs) + channel = kwargs_copy.pop('channel') + envelope_configs = kwargs_copy.pop('envelope_configs', []) + env_data_mem = [] + env_idx_mem = [] + idx_num = 0 + for envelope_config in envelope_configs: + envelope_type = envelope_config.pop('envelope_type') + env_data = self._generate_envelope_data(envelope_type, **envelope_config) + if isinstance(env_data, tuple): + retun_param_count = len(env_data) + else: + retun_param_count = 1 + if retun_param_count == 1: + envelope = env_data + envelope_arr = np.asarray(envelope, dtype=float).reshape(-1) + if envelope_arr.size % 4 != 0: + raise ValueError("Envelope length must be multiple of 4") + env_data_mem += envelope_arr.astype(int).tolist() + envelope_length = int(envelope_arr.size) + current_env_idx = self._next_env_idx(idx_num, env_idx_mem, envelope_length) + env_idx_mem.append(current_env_idx) + idx_num += 1 + elif retun_param_count == 2: + rising_edge, falling_edge = env_data + rising_edge_arr = np.asarray(rising_edge, dtype=float).reshape(-1) + falling_edge_arr = np.asarray(falling_edge, dtype=float).reshape(-1) + if rising_edge_arr.size % 4 != 0: + raise ValueError("Envelope length must be multiple of 4") + env_data_mem += rising_edge_arr.astype(int).tolist() + rising_edge_length = int(rising_edge_arr.size) + rising_edge_idx = self._next_env_idx(idx_num, env_idx_mem, rising_edge_length) + env_idx_mem.append(rising_edge_idx) + idx_num += 1 + env_data_mem += falling_edge_arr.astype(int).tolist() + falling_edge_length = int(falling_edge_arr.size) + falling_edge_idx = self._next_env_idx(idx_num, env_idx_mem, falling_edge_length) + env_idx_mem.append(falling_edge_idx) + idx_num += 1 + + env2mem_format = self._env_data_pack(env_data_mem) + + ENVI_BASE = addr_base['ENVI0_BASE'] + channel*0x600000 + ENVM_BASE = addr_base['ENVM0_BASE'] + channel*0x600000 + self.write_register(ENVI_BASE, env_idx_mem) + self.write_register(ENVM_BASE, env2mem_format) + + +def env_config(mk_instance, **kwargs): + env_gen = EnvelopeGenerator(mk_instance, **kwargs) + env_gen._generate_envelope_batch(**kwargs) \ No newline at end of file diff --git a/4ch-Z_Generator/FourChZreg_define.py b/4ch-Z_Generator/FourChZreg_define.py new file mode 100644 index 0000000..14df843 --- /dev/null +++ b/4ch-Z_Generator/FourChZreg_define.py @@ -0,0 +1,279 @@ +# TODO: 寄存器统一由excel表格维护 +# TODO: 寄存由excel表格生成 +FourChZreg_define = { + 'sys_reg': { + 'IDR': 0x00, + 'VIDR': 0x04, + 'DATER': 0x08, + 'VERR': 0x0C, + 'TESTR': 0x10, + 'IMR': 0x14, + 'ISR': 0x18, + 'SFRTR': 0x1C, + 'SFRR': 0x20, + 'CH0RSTR': 0x24, + 'CH1RSTR': 0x28, + 'CH2RSTR': 0x2C, + 'CH3RSTR': 0x30, + 'DBGCFGR': 0x34, + 'MISR': 0x40, + 'SYNCR': 0x44, + 'MSDENR': 0x48, + 'MSDPCNTR': 0x4C, + }, + 'ctrl_reg': { + 'MCUPARAR0': 0x00, + 'MCUPARAR1': 0x04, + 'MCUPARAR2': 0x08, + 'MCUPARAR3': 0x0C, + 'MCURESR0': 0x10, + 'MCURESR1': 0x14, + 'MCURESR2': 0x18, + 'MCURESR3': 0x1C, + 'RTIMR': 0x98, + 'ICNTR': 0x9C, + 'FSIR': 0xA0, + 'MODMR': 0x100, + 'MODENR': 0x104, + 'MODDOTR': 0x108, + 'MIXODFR': 0x10C, + 'STR': 0x110, + 'NCOAOR': 0x114, + 'SPI_RAMPFIXR': 0x118, + 'SPI_RAMPSR': 0x11C, + 'SPI_RAMPIFSR': 0x120, + 'SPI_RAMPENR': 0x124, + 'TSTIMER': 0x130, + 'TSITVLR': 0x134, + 'TSENR': 0x138, + 'TSVALR': 0x13C, + }, + 'mcu_reg': { + 'CWFR0': 0x40, + 'CWFR1': 0x44, + 'CWFR2': 0x48, + 'CWFR3': 0x4C, + 'CWPRR': 0x50, + 'GAPR0': 0x54, + 'GAPR1': 0x58, + 'GAPR2': 0x5C, + 'GAPR3': 0x60, + 'GAPR4': 0x64, + 'GAPR5': 0x68, + 'GAPR6': 0x6C, + 'GAPR7': 0x70, + 'LCPR': 0x74, + 'AMPR0': 0x78, + 'AMPR1': 0x7C, + 'AMPR2': 0x80, + 'AMPR3': 0x84, + 'BIASR0': 0x88, + 'BIASR1': 0x8C, + 'BIASR2': 0x90, + 'BIASR3': 0x94, + 'RTIMR': 0x98, # Note: Same as in ctrl_reg + 'ICNTR': 0x9C, # Note: Same as in ctrl_reg + 'FSIR': 0xA0, # Note: Same as in ctrl_reg + 'DCBVR': 0xA4, + 'FMER': 0xB4, + 'MCU_RAMPFIXR': 0xB8, + 'MCU_RAMPSR': 0xBC, + 'MCU_RAMPIFSR': 0xC0, + 'MCU_RAMPENR': 0xC4, + 'PRNGSDR': 0xC8, + 'PRNGRESR': 0xCC, + 'MULTR0': 0xD0, + 'MULTR1': 0xD4, + 'DTFR': 0xD8, + }, + 'tc_reg': { + 'TCPARR0': 0x000, + 'TCPARR1': 0x004, + 'TCPARR2': 0x008, + 'TCPARR3': 0x00C, + 'TCPARR4': 0x010, + 'TCPARR5': 0x014, + 'TCPARR6': 0x018, + 'TCPARR7': 0x01C, + 'TCPAIR0': 0x020, + 'TCPAIR1': 0x024, + 'TCPAIR2': 0x028, + 'TCPAIR3': 0x02C, + 'TCPAIR4': 0x030, + 'TCPAIR5': 0x034, + 'TCPAIR6': 0x038, + 'TCPAIR7': 0x03C, + 'TCPBRR0': 0x040, + 'TCPBRR1': 0x044, + 'TCPBRR2': 0x048, + 'TCPBRR3': 0x04C, + 'TCPBRR4': 0x050, + 'TCPBRR5': 0x054, + 'TCPBRR6': 0x058, + 'TCPBRR7': 0x05C, + 'TCPBIR0': 0x060, + 'TCPBIR1': 0x064, + 'TCPBIR2': 0x068, + 'TCPBIR3': 0x06C, + 'TCPBIR4': 0x070, + 'TCPBIR5': 0x074, + 'TCPBIR6': 0x078, + 'TCPBIR7': 0x07C, + 'TCBPR': 0x080, + 'TCCER': 0x084, + 'TCOVR': 0x088, + 'TCCDR': 0x08C, + }, + 'pll_reg': { + 'INTPLL_REFCTRL' : 0x00, + 'INTPLL_PCNT' : 0x04, + 'INTPLL_PFDCTRL' : 0x08, + 'INTPLL_SPDCTRL' : 0x0C, + 'INTPLL_PTATCTRL' : 0x10, + 'INTPLL_SELCTRL' : 0x14, + 'INTPLL_VCOCTRL' : 0x18, + 'INTPLL_TCCTRL' : 0x1C, + 'INTPLL_AFCCTRL' : 0x20, + 'INTPLL_AFCFBCTRL': 0x24, + 'INTPLL_AFCLDCNT' : 0x28, + 'INTPLL_DIVRSTSEL': 0x2C, + 'INTPLL_TESTCLK' : 0x30, + 'INTPLL_DIGCLKSEL': 0x34, + 'INTPLL_STATUS' : 0x38, + 'INTPLL_SYNC' : 0x3C, + 'INTPLL_UPDATE' : 0x40, + 'INTPLL_CLKRXPD' : 0x44, + 'INTPLL_RESV' : 0x48, + 'CCALRSTR' : 0x4C, + 'CCALATENR' : 0x50, + 'CCALSELALNR' : 0x54, + 'CCALDCCQECR' : 0x58, + 'CCALQECCT0R' : 0x5C, + 'CCALQECCT1R' : 0x60, + 'CCALDCCCT0R' : 0x64, + 'CCALDCCCT1R' : 0x68, + 'DIVSYNCDCR' : 0x6C, + 'SYNCCLRENR' : 0x70, + 'CCALDCCCT2R' : 0x74, + 'CCALSTR' : 0x78, + } +} + +# Usage example: +# value = reg_define['sys_reg']['DATER'] # Gets 0x00 +# print(f"IDR value: {value}") +# import reg_define + +# 预定义的TC系数组 +TC_COEFFICIENT_SETS = { + 'default': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': '默认TC系数组' + }, + 'coef1': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'lsw - coef1' + }, + 'coef2': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/300, -1/500, 0, 0, 0, 0, 0], + 'description': 'lsw - coef2' + }, + 'coef3': { + 'amp_real': [0.025, 0.009, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0.012, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/300, -1/500, 0, 0, 0, 0, 0], + + 'description': 'lsw - coef3' + }, + 'coef4': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/2000, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/15, -1/50, 0, 0, 0, 0, 0], + 'description': 'lsw - coef4' + }, + 'coef5': { + 'amp_real': [0.0281, 0.0024, 0.0021, 0.0011, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0033, -0.0027, -0.0027, -0.0002, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef5' + }, + 'coef6': { + 'amp_real': [0.0314, 0.0132, 0.0055, 0.0017, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0002, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef6' + }, + 'coef7': { + 'amp_real': [0, 0.0282, 0, 0.0130, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0193, -0.0051, -0.0012, -0.0020, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef7' + }, + 'coef8': { + 'amp_real': [0.0314*1, 0.0132*1, 0.0055*1, 0.0017*1, 0.0282*1, 0.0130*1, 0.0024*1, 0.0021*1], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0002, -0.0051, -0.0020, -0.0027, -0.0027], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'thfu - coef8' + }, + 'coef9': { + 'amp_real': [0.0314*1, 0.0132*1, 0.0055*1, 0.0017*1, 0.0282*1, 0.0130*1, 0.0024*1, 0.0021*1], + 'amp_imag': [0.012, 0.012, 0.012, 0.012, 0.012, 0.012, 0.012, 0.012], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0011, -0.0051, -0.0020, -0.0027, -0.0027], + 'time_imag': [-1/300, -1/500, -1/15, -1/20, -1/100, -1/200, -1/400, -1/800], + 'description': 'thfu - coef9' + }, + 'custom': { + 'amp_real': [0, 0, 0, 0, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': '自定义系数组 - 需要手动设置' + } +} + + +#### regfile base address #### +addr_base = { + 'SYST_BASE': 0x00000000, + 'DBGM_BASE': 0x01900000, + + 'ITCM0_BASE': 0x00100000, + 'DTCM0_BASE': 0x00200000, + 'CTRL0_BASE': 0x00300000, + 'TCCO0_BASE': 0x00301000, + 'ENVI0_BASE': 0x00400000, + 'ENVM0_BASE': 0x00500000, + 'CLK0_BASE': 0x01F00000, + 'DAC0_BASE': 0x01F01000, + + 'ITCM1_BASE': 0x00700000, + 'DTCM1_BASE': 0x00800000, + 'CTRL1_BASE': 0x00900000, + 'TCCO1_BASE': 0x00901000, + 'ENVI1_BASE': 0x00A00000, + 'ENVM1_BASE': 0x00B00000, + 'CLK1_BASE': 0x01F02000, + 'DAC1_BASE': 0x01F03000, + + +} + +# 共用是SYST_BASE 基地址，前5个地址其实就是偏移地址夹600000，后面两个其实是加1000 + + +fs = 750 #MHz \ No newline at end of file diff --git a/4ch-Z_Generator/ParamsManager.py b/4ch-Z_Generator/ParamsManager.py new file mode 100644 index 0000000..d70040c --- /dev/null +++ b/4ch-Z_Generator/ParamsManager.py @@ -0,0 +1,56 @@ +import json +import os +from pathlib import Path + + +class ParamsManager: + + def __init__(self, params_dir='params'): + self.params_dir = params_dir + self._ensure_dir_exists() + + def _ensure_dir_exists(self): + Path(self.params_dir).mkdir(parents=True, exist_ok=True) + + def save(self, params, filename): + if not filename.endswith('.json'): + filename = filename + '.json' + + filepath = os.path.join(self.params_dir, filename) + + with open(filepath, 'w', encoding='utf-8') as f: + json.dump(params, f, indent=2, ensure_ascii=False) + + def load(self, filename): + if not filename.endswith('.json'): + filename = filename + '.json' + + filepath = os.path.join(self.params_dir, filename) + + with open(filepath, 'r', encoding='utf-8') as f: + params = json.load(f) + return params + + def save_multiple(self, params_dict): + filepaths = [] + for filename, params in params_dict.items(): + filepath = self.save(params, filename) + filepaths.append(filepath) + return filepaths + + def load_multiple(self, filenames): + result = {} + for filename in filenames: + result[filename] = self.load(filename) + return result + +# from ParamsManager import ParamsManager + +# # 创建参数管理器实例 +# pm = ParamsManager('params') # 参数保存在 params 文件夹中 + +# # 保存单个参数 +# pm.save(params, 'AWG_NCO') # 自动添加 .json 后缀 + +# # 加载单个参数 +# params = pm.load('AWG_NCO') diff --git a/4ch-Z_Generator/__pycache__/FourChZAssemblyTemplateManager.cpython-311.pyc b/4ch-Z_Generator/__pycache__/FourChZAssemblyTemplateManager.cpython-311.pyc new file mode 100644 index 0000000000000000000000000000000000000000..4d6c9a2a6316d4586c036f9126cbd5d39270cee1 GIT binary patch literal 13773 zcmd5@Yit`=b{@Wm6Ph!UXj7yzLs_yy zb-jg=FoCocg|e?+UN5ya6B5Ay832_Vg3al3Wq&^^WAB{-DD)Ge?; zJ%SskSMZ43gjMj~vXA=&4hr{a4M$~JoW2sfaZ#L}iG`Emxo|u@DN3_VP}q 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0000000000000000000000000000000000000000..86abfb547bf6c31d0087aa7a8cce4dbeec4eb660 GIT binary patch literal 1332 zcmb7D-D}%c6u(!JZTTzEmC-G*qNJm%v!+>EN+E13?mAWm8>K6IFomK~O+)sVM7?cD2+;Pq(->FAt$ z&iS3MtMB9S2m<}gftRuGAsEy_3{l)D#3_Mu62*pMep!S__T2-&P z^PuzX!{+T_Q|YDi}o?gsB-Bol53s z#3JlQC&nmFQi)B3278@S5$dPHRg;Fubu*jEs}x_Q*rGzdL<9YUA{CZq;XO@p+8hHQ zR^0(TKYMZRnz>LQmH}&;Nlm}EkS)&4tEN7k(G8ubR)Ngu#^={TyOz$WmQ^U8DlXGd zUnZ{tB>U^kU0@FCo= xi: + lowerboundp = i + else: + break + if lowerboundp < self.len - 1: + upperboundp = lowerboundp + 1 + else: + lowerboundp, upperboundp = self.len - 2, self.len - 1 + + x0, y0, x1, y1 = self.xs[lowerboundp], self.ys[lowerboundp], self.xs[upperboundp], self.ys[upperboundp] + if x1 == x0: + return (y0 + y1) / 2.0 + + return y0 + (x-x0)/(x1-x0)*(y1-y0) + + + + +def linspace(start : float, end : float, n : int): + samples = [] + step = (end - start) / (n-1) + for i in range(n): + samples.append(start + float(i)*step) + return samples + +def zeros(n : int): + return [0] * n + +def aczwave(amplitude : float, length : int, + carrierFreq : float, carrierPhase : float, dragAlpha : float, + thf : float, thi : float, lam2 : float, lam3 : float): + + t = linspace(0, 1, length) + han2 = [] + for k, x in enumerate(t): + han2.append( + (1-lam3)*(1-math.cos(2.0*math.pi*x)) + + lam2*(1-math.cos(4*math.pi*x)) + + lam3*(1-math.cos(6*math.pi*x)) + ) + maxHan2 = max(han2) + + ths1 = [] + for k in range(length): + ths1.append( + thi + (thf-thi)*han2[k]/maxHan2 + ) + t1u = zeros(length) + for k, v in enumerate(t1u): + if k < (length - 1): + t1u[k+1] = v + math.sin(ths1[k])/float(length-1) + + for k, v in enumerate(t): + t[k] = v * t1u[length-1] + + th = Interp1d(t1u, ths1) + th0 = 1.0 / math.tan(th(t[0])) + + thval = [] + for k in range(length): + thval.append( + 1.0/math.tan(th(t[k])) - th0 + ) + thmin = min(thval) + + samples = [] + for k in range(length): + env = thval[k] * amplitude / thmin + samples.append(complex(env, 0)) + + return samples + + +def test(): + amplitude = 26214 + length = 30 + carrierFreq = 0 + carrierPhase = 0.000000 + dragAlpha = 0.000000 + thf = 0.864 + thi = 0.05 + lam2 = -0.18 + lam3 = 0.04 + + data = aczwave( + amplitude, length, carrierFreq, + carrierPhase, dragAlpha, + thf, thi, lam2, lam3, + ) + for c in data: + print(c.real, c.imag) + return data + + +class Benchmark: + def __init__(self, num_samplings : int): + self.data_dir = "data" + self.num_samplings = num_samplings + self.params_dict = {} + self.gt_dict = {} + self.load_params() + self.load_gt() + + def load_params(self): + for i in range(self.num_samplings): + file = os.path.join(self.data_dir, "aczgo_param_{}.log".format(i)) + with open(file, 'r') as f: + lines = f.readlines() + params = {} + for line in lines: + key, value = line.split(", ") + if key=="length": + value = int(value) + else: + value = float(value) + params[key] = value + + self.params_dict[i] = params + + def eval(self, idx): + params = self.params_dict[idx] + + amplitude = params["amplitude"] + length = params["length"] + carrierFreq = params["carrierFreq"] + carrierPhase = params["carrierPhase"] + dragAlpha = params["dragAlpha"] + thf = params["thf"] + thi = params["thi"] + lam2 = params["lam2"] + lam3 = params["lam3"] + + data = aczwave( + amplitude, length, carrierFreq, + carrierPhase, dragAlpha, + thf, thi, lam2, lam3, + ) + xs, ys = [], [] + for c in data: + xs.append(c.real) + ys.append(c.imag) + + return (xs, ys) + + def load_gt(self): + for i in range(self.num_samplings): + file = os.path.join(self.data_dir, "aczgo_result_{}.log".format(i)) + xs, ys = [], [] + with open(file, 'r') as f: + lines = f.readlines() + for line in lines: + x, y = line.split(", ") + x, y = float(x), float(y) + xs.append(x) + ys.append(y) + self.gt_dict[i] = (xs, ys) + + def test(self, idx): + def check_valid(vs): + return all(map(lambda x:not np.isnan(x) and not np.isinf(x), vs)) + def max_ab_dis(xs, bxs): + return np.abs(np.array(bxs) - np.array(xs)).max() + + + (bxs, bys) = self.gt_dict[idx] + if check_valid(bxs) and check_valid(bys): + xs, ys = self.eval(idx) + return (max_ab_dis(xs, bxs), max_ab_dis(ys, bys)) + else: + return "not valid" + + def test_all(self): + for i in range(self.num_samplings): + print(self.test(i)) + + +if __name__ == "__main__": + b = Benchmark(11) + print(b.test_all()) + + + +# data = test() +# +# np.savetxt('D:/Work/TailCorr/acz_750.csv', data, delimiter=' ') +# plt.figure() +# plt.plot(data) +# plt.show() + + diff --git a/4ch-Z_Generator/env_gen/flattop.py b/4ch-Z_Generator/env_gen/flattop.py new file mode 100644 index 0000000..54dba31 --- /dev/null +++ b/4ch-Z_Generator/env_gen/flattop.py @@ -0,0 +1,75 @@ + +import numpy as np +from scipy.special import erf + +def flattop(A, edge, length, fsn): + ''' + 生成平顶包络函数 (Python版本) + + Parameters: + ----------- + A : float + 幅度 + edge : float + 边沿时间参数 + length : int + 长度（采样点数） + fsn : float + 采样频率 + + Returns: + -------- + numpy.ndarray + 平顶包络波形 + ''' + Ts = 0 + r_sigma = 0.21230 + + T = length / fsn + t = np.arange(0, length + 2) / fsn + + mu = 0.5 * edge + sigma = r_sigma * (edge - 1) + p = T - 1 - edge + + x1 = (t - mu - Ts) / (np.sqrt(2) * sigma) + x2 = (t - mu - p + Ts) / (np.sqrt(2) * sigma) + + f = A / 2 * (erf(x1) - erf(x2)) + # f_padded = np.pad(f, (1, 1), mode='constant', constant_values=0) + + return f +""" +# 使用示例 +if __name__ == "__main__": + # 测试参数 + A = 1.0 # 幅度 + edge = 0.1 # 边沿时间 + length = 1000 # 长度 + fsn = 10000 # 采样频率 + + # 生成平顶包络 + envelope = flattop(A, edge, length, fsn) + + print(f"生成的包络长度: {len(envelope)}") + print(f"最大值: {np.max(envelope):.6f}") + print(f"最小值: {np.min(envelope):.6f}") + + # 可选：绘图显示 + try: + import matplotlib.pyplot as plt + + plt.figure(figsize=(10, 6)) + time_axis = np.arange(len(envelope)) / fsn + plt.plot(time_axis, envelope, 'b-', linewidth=2) + plt.xlabel('时间 (s)') + plt.ylabel('幅度') + plt.title('平顶包络波形') + plt.grid(True, alpha=0.3) + plt.tight_layout() + plt.show() + + except ImportError: + print("matplotlib 未安装，跳过绘图") + +""" \ No newline at end of file diff --git a/4ch-Z_Generator/gen_cases/General/env2.json b/4ch-Z_Generator/gen_cases/General/env2.json new file mode 100644 index 0000000..fd1fd7f --- /dev/null +++ b/4ch-Z_Generator/gen_cases/General/env2.json @@ -0,0 +1,150 @@ +{ + "channel": 3, + "chip_mode": "AWG", + "mode": "nco", + "tail_en": false, + "tc_coef_set": "coef3", + "inner_sync": false, + "amp_mod_enable": true, + "freq_mod_enable": true, + "bias_enable": true, + "fcw": [ + 400, + 200, + 300, + 400 + ], + "mcu_reg_clr": true, + "pcw": [ + 0, + 30, + 45, + 90, + 120, + 135, + 150, + 180 + ], + "rz_ff_pha": 0, + "rz_fm_pha": 45, + "ff_amp": [ + 32767, + 32767, + 32767, + 32767 + ], + "fm_amp": [ + 32767, + 32767, + 32767, + 32767 + ], + "bias": [ + 1, + 2, + 3, + 4 + ], + "fm_en": false, + "instr_type": "general_send_wait", + "send_interval": [ + 100, + 150, + 200, + 250, + 300, + 350, + 400, + 450, + 500 + ], + "cycle_num": 1, + "codeword_configs": [ + { + "wave_hold": 0, + "fcw_index": 0, + "pcw_index": 0, + "code_clr": 1, + "env_index": 4 + }, + { + "wave_hold": 0, + "fcw_index": 0, + "pcw_index": 0, + "code_clr": 1, + "env_index": 5 + }, + { + "wave_hold": 0, + "fcw_index": 0, + "pcw_index": 0, + "code_clr": 1, + "env_index": 6 + }, + { + "wave_hold": 0, + "fcw_index": 0, + "pcw_index": 0, + "code_clr": 1, + "env_index": 7 + }, + { + "wave_hold": 0, + "fcw_index": 0, + "pcw_index": 0, + "code_clr": 1, + "env_index": 8 + } + ], + "sweep_config": { + "sweep_num": 0, + "offsets": [ + 120, + 64 + ], + "steps": [ + 3000, + 143165576 + ] + }, + "envelope_configs": [ + { + "envelope_type": "rect_hold", + "amp": 32767 + }, + { + "envelope_type": "flattop_hold", + "amp": 32767, + "edge_time": 3.5, + "wave_time": 30 + }, + { + "envelope_type": "acz", + "amp": 32767, + "wave_time": 48 + }, + { + "envelope_type": "accz", + "wave_time": 48 + }, + { + "envelope_type": "cosine", + "amp": 32767, + "wave_time": 300 + }, + { + "envelope_type": "rect", + "amp": 32767, + "wave_time": 12 + }, + { + "envelope_type": "flattop", + "amp": 32767, + "edge_time": 2, + "wave_time": 22 + } + ], + "FolderName": "General", + "CaseName": "env2", + "config_file": "D:\\MyDocument\\工作\\Z芯片的case生成器\\4ch-Z_Generator\\gen_cases\\General\\env2_HEX.txt" +} \ No newline at end of file diff --git a/4ch-Z_Generator/gen_cases/General/env2_HEX.txt b/4ch-Z_Generator/gen_cases/General/env2_HEX.txt new file mode 100644 index 0000000..7d4f9eb --- /dev/null +++ b/4ch-Z_Generator/gen_cases/General/env2_HEX.txt @@ -0,0 +1,1452 @@ +00300108 +00100004 +00000006 + +00300104 +00100004 +00000000 + +00200040 +00100058 +08888888 +11111111 +19999999 +22222222 +80000000 +00000000 +15550000 +1fff0000 +3fff0000 +55550000 +5fff0000 +6aaa0000 +7fff0000 +00000000 +7fff7fff +7fff7fff +7fff7fff +7fff7fff +00010000 +00020000 +00030000 +00040000 + +002000b4 +00100004 +00000000 + +00400000 +00100024 +00000004 +00080004 +00100008 +00200008 +00300030 +00900030 +00f0012c +0348000c +03600018 + +00500000 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+fc0216e3 +00f0000b +0a012c23 +0c012223 +0000002b + +01700000 +00100004 +00000000 + diff --git a/4ch-Z_Generator/make_case.py b/4ch-Z_Generator/make_case.py new file mode 100644 index 0000000..337de33 --- /dev/null +++ b/4ch-Z_Generator/make_case.py @@ -0,0 +1,93 @@ +from ctypes import Union +import numpy as np +import random + +class make_case(object): + + def __init__( + self + ): + self = 0 + + def data_gen( + self, + mode = 'random', + length = 1, + params = {} + ): + + match mode: + case 'random': + data = [random.randint(0,2**32) for _ in range(length)] + case 'ones': + data = (2**32-1)*np.ones(length) + case 'amp': + amp = params['amp'] + amp = int(amp,0) if isinstance(amp, str) else int(amp) + data = amp*np.ones(length) + case 'zeros': + data = np.zeros(length) + case 'value': + value = params['value'] + if np.size(value) != length: + print("Warnning: Length Mismatch") + elif length ==1: + data = int(value,0) if isinstance(value, str) else int(value) + else: + data = np.zeros(length) + for i in range(0,length): + data[i] = int(value[i],0) if isinstance(value[i], str) else int(value[i]) + case 'acc': + ini_data = params['ini_data'] + ini_data = int(ini_data,0) if isinstance(ini_data, str) else int(ini_data) + step_size = params['step_size'] + step_size = int(step_size,0) if isinstance(step_size, str) else int(step_size) + data = np.zeros(length) + for i in range(0,length): + data[i] = ini_data + i*step_size + case 'rd_file': + file_name = params['file_name'] + with open(file_name, "r") as f: + data_bin = f.read() + data_bin = data_bin.split('\n') + data = [] + for d in data_bin: + data.append((int(d,2))) + return data + + def rw_once( + self, + op = 'w', + addr = 0x1F00044, + data = [0], + file_name = 'case.txt', + chip_id = 0, + exaddr = 1, + ard_flag = 0 + ): + + with open(file_name, "a") as f: + cmd = 1 if (op=='r') or (op==1) else 0 + if isinstance(addr, str): + addr = int(addr,0) + else: + addr = int(addr) + f.write(f"{((int(cmd)<<31) | (int(ard_flag)<<30) | (int(chip_id)<<25) | (addr)):08x}\n") + f.write(f"{((int(exaddr)<<20) | (int(np.size(data)*4))):08x}\n") + + if op == 'w': + if np.size(data) == 1: + if isinstance(data, str): + dt = int(data,0) + else: + dt = int(np.round(data)) + f.write(f"{(dt if dt>=0 else 2**32+dt):08x}\n") + else: + for i in range(0,np.size(data)): + if isinstance(data[i], str): + dt = int(data[i],0) + else: + dt = int(np.round(data[i])) + f.write(f"{(dt if dt>=0 else 2**32+dt):08x}\n") + f.write('\n') + diff --git a/4ch-Z_Generator/make_inst.py b/4ch-Z_Generator/make_inst.py new file mode 100644 index 0000000..fa9d79e --- /dev/null +++ b/4ch-Z_Generator/make_inst.py @@ -0,0 +1,319 @@ +import numpy as np + +class make_inst(object): + + def parse_instruction(self, instruction, labels, pc): + # 去掉所有逗号 + instruction = instruction.replace(',', ' ') + parts = instruction.split() + opcode = parts[0].upper().strip() + + if opcode.endswith(':'): + # 处理标签 + label_name = opcode[:-1] + labels[label_name] = pc + return None + + operands = [op.strip() for op in parts[1:]] + + def parse_immediate(imm_str): + try: + if imm_str.startswith('0x') or imm_str.startswith('0X'): + return int(imm_str, 16) + elif imm_str.startswith('0b') or imm_str.startswith('0B'): + return int(imm_str, 2) + elif imm_str.startswith('-0x') or imm_str.startswith('-0X'): + return -int(imm_str[1:], 16) + elif imm_str.startswith('-0b') or imm_str.startswith('-0B'): + return -int(imm_str[1:], 2) + elif imm_str.startswith('-'): + return -int(imm_str[1:], 10) + else: + return int(imm_str, 10) + except ValueError: + raise ValueError(f"Invalid immediate value: {imm_str}") + + if opcode == 'LUI': + rd, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + return format((self.opcode_map[opcode]) | (imm & 0xFFFFF) << 12 | (rd << 7), '032b') + + elif opcode == 'AUIPC': + rd, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + return format((self.opcode_map[opcode]) | (imm & 0xFFFFF) << 12 | (rd << 7), '032b') + + elif opcode == 'JAL': + rd, label_or_imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + if label_or_imm.lstrip('-').isdigit() or label_or_imm.startswith(('0x', '0X', '0b', '0B', '-0x', '-0X', '-0b', '-0B')): + imm = parse_immediate(label_or_imm) + else: + imm = labels.get(label_or_imm.upper().strip(), 0) - pc + imm_bits = (((imm >> 20) & 0x1) << 19) | (((imm >> 1) & 0x3FF) << 9) | (((imm >> 11) & 0x1) << 8) | ((imm >> 12) & 0xFF) + return format((self.opcode_map[opcode]) | (imm_bits) << 12 | (rd << 7), '032b') + + elif opcode == 'JALR': + rd = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (imm & 0xFFF) << 20 | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['BEQ', 'BNE', 'BLT', 'BGE', 'BLTU', 'BGEU']: + rs1, rs2, label_or_imm = operands + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + if label_or_imm.lstrip('-').isdigit() or label_or_imm.startswith(('0x', '0X', '0b', '0B', '-0x', '-0X', '-0b', '-0B')): + imm = parse_immediate(label_or_imm) + else: + imm = labels.get(label_or_imm.upper().strip(), 0) - pc + imm_high_bits = (((imm >> 12) & 0x1) << 6) | (((imm >> 5 ) & 0x3F)) + imm_low_bits = (((imm >> 1 ) & 0xF) << 1) | (((imm >> 11) & 0x1 )) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (imm_high_bits << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (imm_low_bits << 7), '032b') + + elif opcode in ['LB', 'LH', 'LW', 'LBU', 'LHU']: + rd = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['SB', 'SH', 'SW']: + rs2 = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (((imm >> 5) & 0x7F) << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | ((imm & 0x1F) << 7), '032b') + + elif opcode in ['ADDI', 'SLTI', 'SLTIU', 'XORI', 'ORI', 'ANDI']: + rd, rs1, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['SLLI', 'SRLI', 'SRAI']: + rd, rs1, shamt = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + shamt = parse_immediate(shamt) + funct3 = self.opcode_funct3_map[opcode] + funct7 = self.opcode_funct7_map[opcode] + return format((self.opcode_map[opcode]) | (funct7 << 25) | ((shamt & 0x1F) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['ADD', 'SUB', 'SLL', 'SLT', 'SLTU', 'XOR', 'SRL', 'SRA', 'OR', 'AND']: + rd, rs1, rs2 = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + funct3 = self.opcode_funct3_map[opcode] + funct7 = self.opcode_funct7_map[opcode] + return format((self.opcode_map[opcode]) | (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['WAIT', 'SEND', 'SENDC']: + rd, rs1, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['EXIT']: + return format((self.opcode_map[opcode]), '032b') + + elif opcode in ['EXIT_IR']: + return '00000000000000000001000000101011' + + else: + raise ValueError(f"Unsupported opcode: {opcode}") + + def write(self, instructions, file_name, exaddr = 1, chip_id = 0, channel_id = 0, pc_start = 0, ard_flag = 0, show = False): + if instructions == "": + pass + else: + labels = {} + binary_instructions = [] + + # 将整段汇编代码拆成多条指令组成的字符串数组 + inst_list = instructions.split('\n') + instructions = [] + for this_inst in inst_list: + this_inst = this_inst.split('#') + if this_inst[0].strip() != '': + instructions.append(this_inst[0].strip()) + + # 第一遍扫描：记录标签位置 + pc = pc_start + for instr in instructions: + binary = self.parse_instruction(instr, labels, pc) + if binary is not None: + binary_instructions.append(binary) + pc += 4 + else: + # 如果是标签，不增加pc + pass + + # 第二遍扫描：生成最终的二进制代码 + pc = pc_start + final_binary_instructions = [] + for instr in instructions: + binary = self.parse_instruction(instr, labels, pc) + if binary is not None: + final_binary_instructions.append(binary) + if show: + print(f"{instr}: {binary}") + pc += 4 + else: + # 如果是标签，不增加pc + pass + + with open(file_name, "a") as f: + base_addr = 0x010_0000 + pc_start + channel_id * 0x060_0000 + length = np.size(final_binary_instructions) + f.write(f"{((ard_flag << 30) | (chip_id << 25) | (base_addr)):08x}\n") + f.write(f"{((exaddr << 20) | (length<<2)):08x}\n") + for binary_instr in final_binary_instructions: + f.write(f"{int(binary_instr,2):08x}\n") + f.write("\n") + + return final_binary_instructions + + opcode_map = { + 'LUI': 0x37, + 'AUIPC': 0x17, + 'JAL': 0x6F, + 'JALR': 0x67, + 'BEQ': 0x63, + 'BNE': 0x63, + 'BLT': 0x63, + 'BGE': 0x63, + 'BLTU': 0x63, + 'BGEU': 0x63, + 'LB': 0x03, + 'LH': 0x03, + 'LW': 0x03, + 'LBU': 0x03, + 'LHU': 0x03, + 'SB': 0x23, + 'SH': 0x23, + 'SW': 0x23, + 'ADDI': 0x13, + 'SLTI': 0x13, + 'SLTIU': 0x13, + 'XORI': 0x13, + 'ORI': 0x13, + 'ANDI': 0x13, + 'SLLI': 0x13, + 'SRLI': 0x13, + 'SRAI': 0x13, + 'ADD': 0x33, + 'SUB': 0x33, + 'SLL': 0x33, + 'SLT': 0x33, + 'SLTU': 0x33, + 'XOR': 0x33, + 'SRL': 0x33, + 'SRA': 0x33, + 'OR': 0x33, + 'AND': 0x33, + 'WAIT': 0x0B, + 'SEND': 0x0B, + 'SENDC': 0x0B, + 'EXIT': 0x2B, + } + + opcode_funct3_map = { + 'JALR': 0x0, + 'BEQ': 0x0, + 'BNE': 0x1, + 'BLT': 0x4, + 'BGE': 0x5, + 'BLTU': 0x6, + 'BGEU': 0x7, + 'LB': 0x0, + 'LH': 0x1, + 'LW': 0x2, + 'LBU': 0x4, + 'LHU': 0x5, + 'SB': 0x0, + 'SH': 0x1, + 'SW': 0x2, + 'ADDI': 0x0, + 'SLTI': 0x2, + 'SLTIU': 0x3, + 'XORI': 0x4, + 'ORI': 0x6, + 'ANDI': 0x7, + 'SLLI': 0x1, + 'SRLI': 0x5, + 'SRAI': 0x5, + 'ADD': 0x0, + 'SUB': 0x0, + 'SLL': 0x1, + 'SLT': 0x2, + 'SLTU': 0x3, + 'XOR': 0x4, + 'SRL': 0x5, + 'SRA': 0x5, + 'OR': 0x6, + 'AND': 0x7, + 'WAIT': 0x0, + 'SEND': 0x2, + 'SENDC': 0x3, + 'EXIT': 0x0, + } + + opcode_funct7_map = { + 'JALR': 0x00, + 'BEQ': 0x00, + 'BNE': 0x00, + 'BLT': 0x00, + 'BGE': 0x00, + 'BLTU': 0x00, + 'BGEU': 0x00, + 'LB': 0x00, + 'LH': 0x00, + 'LW': 0x00, + 'LBU': 0x00, + 'LHU': 0x00, + 'SB': 0x00, + 'SH': 0x00, + 'SW': 0x00, + 'ADDI': 0x00, + 'SLTI': 0x00, + 'SLTIU': 0x00, + 'XORI': 0x00, + 'ORI': 0x00, + 'ANDI': 0x00, + 'SLLI': 0x00, + 'SRLI': 0x00, + 'SRAI': 0x20, + 'ADD': 0x00, + 'SUB': 0x20, + 'SLL': 0x00, + 'SLT': 0x00, + 'SLTU': 0x00, + 'XOR': 0x00, + 'SRL': 0x00, + 'SRA': 0x20, + 'OR': 0x00, + 'AND': 0x00, + 'WAIT': 0x00, + 'SEND': 0x00, + 'SENDC': 0x00, + 'EXIT': 0x00, + } \ No newline at end of file diff --git a/Z_case_Generator_V2.0/ZChipConfig.py b/Z_case_Generator_V2.0/ZChipConfig.py index dab08d3..911e6a2 100644 --- a/Z_case_Generator_V2.0/ZChipConfig.py +++ b/Z_case_Generator_V2.0/ZChipConfig.py @@ -314,7 +314,7 @@ class ZChipConfig(object): self.write_register(moddotr_addr, moddotr_val) #调制使能寄存器300104配置开始 - amp_mod_enable = kwargs.pop('amp_mod_enSable', False) + amp_mod_enable = kwargs.pop('amp_mod_enable', False) freq_mod_enable = kwargs.pop('freq_mod_enable', False) bias_enable = kwargs.pop('bias_enable', False) # 低电平使能逻辑：True(开启) -> 0，False(关闭) -> 1 diff --git a/Z_case_Generator_V2.0/__pycache__/ZChipConfig.cpython-311.pyc b/Z_case_Generator_V2.0/__pycache__/ZChipConfig.cpython-311.pyc index 9f8efdd456e0c000090f6d44db1308bb9e981a56..97b1b0bcdc84d15ce02857d1cf6955e3b51e6de5 100644 GIT binary patch delta 109 zcmdl!iE;HLM&9MTyj%=GkZF*fwQeKtRy%IK#N2}T-29aI)V$5->^vA*i*5qtH>)`~ zFmYP!P`xPYa7ET(bH39KR>t3xH9T_Ve*>k9qCkWQh!6r2zc_4wCY0u++7k delta 97 zcmZ2IiE;ZRM&9MTyj%=Gpmif9YyC#vt#&;8iMa*wx%nyasd>Sh&)Rt~3f$sD2qh-v sq;8gSaA4xJ++liA*71t0