interface sram_if #(parameter ADDR_WIDTH = 8, parameter DATA_WIDTH = 32)(input bit clk);
    // Signals for interfacing with the SRAM
    logic [ADDR_WIDTH-1:0]   addr;
    logic [DATA_WIDTH-1:0]   din;
    logic [DATA_WIDTH-1:0]   dout;
    logic                    rden;
    logic                    wren;
    logic [DATA_WIDTH/8-1:0] wben;

    modport master(
        output   addr,
        output   din,
        input    dout,
        output   wren,
        output   rden,
        output   wben
    );

    modport slave (
        input    addr,
        input    din,
        output   dout,
        input    wren,
        input    rden,
        input    wben
    );
	/*
// synopsys translate_off
    // write operation
    task write;
        input logic [ADDR_WIDTH-1:0] addr_in;
        input logic [DATA_WIDTH-1:0] data_in;
        input logic [DATA_WIDTH/8-1:0] byte_enable;
        begin
            addr = addr_in;
            din = data_in;
            wben = byte_enable;
            wren = 1;
            rden = 0;
            @(posedge clk);
            wren = 0;
        end
    endtask

    // read oepration
    task read;
        input logic [ADDR_WIDTH-1:0] addr_in;
        begin
            addr = addr_in;
            wren = 0;
            rden = 1;
            @(posedge clk);
            rden = 0;
        end
    endtask
// synopsys translate_on
*/	
endinterface